CANCAN Topology Lab

How long can a CAN-FD stub be?

Guide · updated on 2026-11-10

A stub is the branch that connects a node to the backbone. Transmission-line effects are always present; what changes with speed is how much they matter. At low bit rates the network has plenty of time for propagation delays and settling. In CAN-FD (2, 5 or 8 Mbit/s in the data phase) bits are much shorter, and a stub becomes a line whose reflections can still be ringing when the receiver samples.

What happens at the junction

In the ideal model of a T-junction between three lines with the same characteristic impedance, the incoming edge sees the two continuing lines in parallel:

Zeq=Z0∥Z0=Z02Γ=Z0/2−Z0Z0/2+Z0=−13

One third of the amplitude is reflected back towards the transmitter and two thirds continue into each branch. The far end of the stub is almost open (ΓL≈+1), so the edge returns to the junction after the round-trip time

tRT=2tpd,stub=2ℓv

and starts a train of reflections: the ringing. In a real network the picture is modified by the transceiver input impedance, parasitic capacitance, PCB discontinuities, terminations and cable losses, so the actual reflection is not exactly the ideal one. This is what the simulator models segment by segment.

A first-order rule of thumb

A conservative rule for a first estimate of the stub length is:

2tpd,stub<tr3⇒ℓ<v·tr6

where tpd,stub=ℓ/v is the one-way delay of the stub. With a cable at about 5 ns/m (v ≈ 2·10⁸ m/s):

Transition time trEstimated maximum stub length
20 ns≈ 0.67 m
30 ns≈ 1.00 m
40 ns≈ 1.33 m

This is a simplified estimate, not a universal CAN-FD limit: the real limit depends on the transceiver, the topology, the cable and the receivers' timing margins.

Two different criteria. The familiar 0.3 m limit comes from the traditional high-speed Classical CAN topology in ISO 11898-2 (up to 1 Mbit/s). It is a conventional limit, not the result of the formula above, and the two should not be confused.

CAN-FD data rates

The bit rate sets the bit time, not the edge speed:

Tbit=1fbit
Data rateBit time
2 Mbit/s500 ns
5 Mbit/s200 ns
8 Mbit/s125 ns

At higher data rates there is less time for the ringing to settle, so shorter stubs are generally preferable. Keeping stubs below 10–30 cm is a conservative practical design target, not a theoretical limit. The actual limit depends on four things together: the transceiver's rise and fall times, the bit time, the sample point, and the network itself (impedances, terminations, node capacitance, number and position of branches). Operation at 8 Mbit/s also needs particular attention to the capabilities and qualification of the chosen controller and transceiver.

The sample point

The data-phase sample point depends on the bit rate, the transceiver and the timing requirements of the network; there is no single right value for every speed.

  • At 2 Mbit/s, sample points around 70–80% give the ringing more time to settle.
  • At higher rates, such as 5 Mbit/s, a sample point closer to the middle of the bit can give better timing margins against jitter and transceiver asymmetry.

Robustness should be checked against the earliest and latest instants at which each receiver may actually sample, not only the nominal sample point. Those instants move with oscillator tolerance, transceiver asymmetry between the two edges, MCU–transceiver delays and propagation delay. In CAN-FD the transmitter also checks its own bits at a secondary sample point (SSP) with transmitter delay compensation (TDC); that is a separate instant from the receivers' sample point.

How to use the simulator for this

  1. Select the stub and lengthen it by dragging the node (Shift for 1 mm steps).
  2. Watch the voltage margin and the settling time at each receiver.
  3. Use “Pin trace” to compare two lengths.

The simulator computes the differential voltage CANH − CANL along the real topology and checks it against the receiver thresholds at the nominal sample point of each node, shifted by the propagation delay. It does not model oscillator tolerance, transceiver timing asymmetry or TDC. Treat “settling well before the sample point” as a necessary condition and keep a time margin on both sides of it.

A pre-layout and what-if tool: it does not replace SPICE, measurements or compliance testing. See the technical disclaimer.
Try it on your own bus.

Draw the topology, pick the bit rate and check the voltage margin at every receiver's sample point. It runs in your browser: your topologies and files are never uploaded.

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